// ***********************************
// C++ Virtual Machine ' Sample
// Fabrice BONTE [amx@libertysurf.fr]
// 2004
// ***********************************


#include "stdafx.h"
#include "stdio.h"
#include "stdlib.h"



// Processor management ******************************* //
// **************************************************** //

#define AX 1
#define BX 2
#define CX 3
#define DX 4
#define ES 5
#define CS 6
#define DS 7
#define SI 8
#define DI 9
#define BP 10
#define IP 11
#define SS 12
#define MOV 3
#define PUSH 1
#define POP 2
#define MOVN 4
#define JMP 5
#define RET 255


class V_processor {

public:

	int _AX;
	int _BX;
	int _CX;
	int _DX;

	int _ES;
	int _CS;
	int _DS;

	int _SI;
	int _DI;

	int _BP;
	int _IP;
	int _SS;

	int * _Stack;
	int _Stack_Size;
	int stack_pos;
	

public:
	V_processor(int stack_size);
	~V_processor();
	int exec_INST(int INSTR,int OP2,int OP3);
	int push(int OP);
	int pop(int OP);
	int * assign_register_OP(int OP);
	void mov(int OP1,int OP2);
	void movN(int OP1,int OP2);
	void jmp(int OP1);
	void print_reg(void);
	void rst_proc(void);

};

void V_processor::rst_proc(void)
{
	_AX=_BX=_CX=_DX=_ES=_CS=_DS=_SI=_DI=_BP=_IP=_SS=stack_pos=0;
}

V_processor::V_processor(int stack_size=10)
{
	_Stack=(int *)malloc(sizeof(int)*stack_size);
	_Stack_Size=stack_size;
	_AX=_BX=_CX=_DX=_ES=_CS=_DS=_SI=_DI=_BP=_IP=_SS=stack_pos=0;

}

int V_processor::exec_INST(int INSTR,int OP2,int OP3)
{
	_IP=_IP+3;

	switch(INSTR)
	{
	case 1: push(OP2);return 0;break;
	case 2: pop(OP2);return 0;break;
	case 3: mov(OP2,OP3);return 0;break;
	case 4: movN(OP2,OP3);return 0;break;
	case 5: jmp(OP2);return 0;break;
	case 255:return -1;break;
	default:break;
	}
}



int * V_processor::assign_register_OP(int OP)
{
	switch(OP)
	{
	case AX: return &_AX;break;
	case BX: return &_BX;break;
	case CX: return &_CX;break;
	case DX: return &_DX;break;
	case ES: return &_ES;break;
	case CS: return &_CS;break;
	case DS: return &_DS;break;
	case SI: return &_SI;break;
	case DI: return &_DI;break;
	case BP: return &_BP;break;
	case IP: return &_IP;break;
	case SS: return &_SS;break;
	default:return NULL;
	}
}

int V_processor::push(int OP)
{
	int * _register;
	_register=assign_register_OP(OP);
	if(stack_pos<_Stack_Size)
	{
		_Stack[stack_pos]=*_register;
		stack_pos++;
		return 1;
	}
	else
	{
		return -1;
	}

}

int V_processor::pop(int OP)
{
	int * _register;
	_register=assign_register_OP(OP);

	if(stack_pos>0)
	{
		stack_pos--;
		*_register=_Stack[stack_pos];
		return 1;
	}
	else
	{
		return 0;
	}
}
void V_processor::mov(int OP1,int OP2)
{
	int * _register;
	int * _register1;
	_register=assign_register_OP(OP1);
	_register1=assign_register_OP(OP2);
	*_register=*_register1;
}

void V_processor::movN(int OP1,int OP2)
{
	int * _register;
	_register=assign_register_OP(OP1);
	*_register=OP2;
}

void V_processor::jmp(int OP1)
{
	_IP=*assign_register_OP(OP1);
}

V_processor::~V_processor()
{
	free(_Stack);
}

void V_processor::print_reg(void)
{
	printf("ax=%d bx=%d cx=%d dx=%d es=%d ds=%d cs=%d IP=%d",_AX,_BX,_CX,_DX,_ES,_DS,_CS,_IP);
}

// **************************************************** //
// **************************************************** //



// Memory management ********************************** //
// **************************************************** //

#define EXPR SEG<qSEG && OFF<qOFF


class V_memory{
private:
	int **table;
	int qSEG,qOFF;
	int FLAG;
	long int mem_S;

public:
	V_memory(unsigned short int SEG,unsigned short int OFF);
	int PByte_Access(unsigned short int SEG,unsigned short int OFF,unsigned short int Value);
	int GByte_Access(unsigned short int SEG,unsigned short int OFF);
	void V_memory_init(void);
	long int V_memory_size(void);
};

V_memory::V_memory(unsigned short int SEG,unsigned short int OFF)
{
	int i;
	table=(int **)malloc(sizeof(int*)*SEG);
	for(i=0;i<OFF;i++)
	{
		table[i]=(int *)malloc(sizeof(int)*OFF);
	}
	qSEG=SEG;
	qOFF=OFF;
	FLAG=0;
	mem_S=SEG*OFF;
}

int V_memory::PByte_Access(unsigned short int SEG,unsigned short int OFF,unsigned short int Value)
{
	if(EXPR)
	{
	table[SEG][OFF]=Value;
	return 0;
	}
	else
	{
	return 1;
	}
}

int V_memory::GByte_Access(unsigned short int SEG,unsigned short int OFF)
{
	if(EXPR)return table[SEG][OFF];else return -1;

}
void V_memory::V_memory_init(void)
{
	int i,j;
	for(i=0;i<qSEG;i++)
	{
		for(j=0;j<qOFF;j++)
		{
			table[i][j]=0;
		}
	}
}

long int V_memory::V_memory_size(void)
{
	return mem_S;
}


// **************************************************** //
// **************************************************** //


#define X IO_MEM

// Write instruction to Virtual Memory ******************** //

void IO_MEM(V_memory &xM80,int& pos,int INST,int INST1,int INST2)
{

	xM80.PByte_Access(0,pos++,INST);
	xM80.PByte_Access(0,pos++,INST1);
	xM80.PByte_Access(0,pos++,INST2);
}

// Instructions's program ******************************** //

void INSTR_IN_MEM(V_memory & xM80)
{
	int P=0;

	X(xM80,P,MOVN,AX,10);
	X(xM80,P,PUSH,AX,0);
	X(xM80,P,POP,BX,0);
	X(xM80,P,MOVN,CX,50);
	X(xM80,P,JMP,CX,0);
	xM80.PByte_Access(0,50,RET);
}

// Core machine *************************************** //

void CPU()
{		
	V_processor x90(100);
	V_memory xM80(100,100);
	int ind=0;
	x90._IP=x90._SS=0;
	INSTR_IN_MEM(xM80);
	while(ind!=-1)
	{
	ind=x90.exec_INST(xM80.GByte_Access(x90._SS,x90._IP),xM80.GByte_Access(x90._SS,x90._IP+1),xM80.GByte_Access(x90._SS,x90._IP+2));
	}
	x90.print_reg();
}

void main()
{

	CPU();
	
}